Job Description

A RTL Design - Senior Staff Engineer is a highly experienced professional responsible for designing, implementing, and verifying complex digital circuits at the RTL (Register Transfer Level) using hardware description languages such as Verilog or VHDL. This role typically focuses on the design of high-performance SoCs (System-on-Chip), ASICs (Application-Specific Integrated Circuits), and FPGAs (Field-Programmable Gate Arrays). The Senior Staff Engineer leads design efforts, guides teams, and ensures the implementation of efficient and optimized hardware solutions.